Overview
Information | Dual UART with 8 Bytes Transmit and Receive FIFO |
---|---|
Data Bus Interface | Intel |
# of Channels | 2 |
Max Data Rate 5V (Mbps) | 1 |
Max Data Rate 3.3V (Mbps) | 0.5 |
Max Data Rate 2.5V (Mbps) | na |
Max Data Rate 1.8V (Mbps) | na |
Tx FIFO (Bytes) | 8 |
Rx FIFO (Bytes) | 8 |
Auto Flow Control | ✔ |
Auto RS-485 Half-Duplex Control | |
Multidrop (9-bit) Mode | ✔ |
Fractional Baud Rate Generator | |
Power Down Mode | ✔ |
Supply Voltage Range VCC (V) | 2.97 to 5.5 |
Auto RTS/CTS | ✔ |
Package | PLCC-44 |
FIFO Level Counters | |
Selectable/ Programable Trigger Levels | S |
IrDA Sup | |
5V Tolerant Inputs | ✔ |
Max UART/GPIO Input Voltage (V) | 5.5 |
Max UART/GPIO Output Voltage (V) | VCC |
Temperature Range (°C) | -40 to 85 |
The XR88C92 is a Dual Universal Asynchronous Receiver and Transmitter with 8 bytes transmit and receive FIFO. The XR88C92 is a pin and functional replacement for the SC26C92 and an improved version of the Philips SCC2692 UART with additional features. The operating speed of the receiver and transmitter can be selected independently from a table of twenty four fixed baud rates, a 16x clock derived from a programmable counter/timer, or an external 1x or 16x clock.
The baud rate generator and counter/timer can operate directly from a crystal or from external clock input. The XR88C92 provides a power-down mode in which the oscillator is stopped but the register contents are retained. The XR88C92 is fabricated in an advanced CMOS process to achieve low power and high speed requirements.
- Pin to pin- and functional- compatible to SC26C92
- Enhanced Multidrop mode operation with separate storage for address and data tags (9th bit)
- 8 Bytes transmit/receive FIFO
- Standard baud rates from 50bps to 230.4kbps
- Non-standard baud rate of up to 1Mbps
- Transmit and Receive trigger levels
- Watch dog timer
- Programmable clock source for receiver and transmitter of each channel
- Single interrupt output
- 7 Multipurpose inputs
- 8 Multipurpose outputs
- 3.3 or 5 volts operation
- Various Loopback modes
- Programmable character lengths (5, 6, 7, 8)
- Parity, framing, and over run error detection
- Programmable 16-bit timer/counter
- On-chip crystal oscillator
- TTL compatible inputs, outputs
- Power down mode
- Pb-Free, RoHS Compliant Versions Offered
- Portable Appliances
- Telecommunication Network Routers
- Ethernet Network Routers
- Cellular Data Devices
- Factory Automation and Process Controls
Documentation & Design Tools
Type | Title | Version | Date | File Size |
---|---|---|---|---|
Data Sheets | XR88C92/192 Dual Universal Asynchronous Receiver and Transmitter | REV 1.35 | October 2021 | 1.8 MB |
Application Notes | DAN-173, Upgrading from XR88C681 to XR88C92 and XR88C192 | 1.0.0 | January 2004 | 41.7 KB |
Application Notes | DAN-120, XR88C92 vs. SC28L92 | 1.0.0 | June 2002 | 32.3 KB |
Application Notes | DAN-123, XR88C92 vs. SC2692 | 1.0.0 | June 2002 | 28.9 KB |
Application Notes | DAN-124, XR88C92 vs. SC26C92 | 1.0.0 | June 2002 | 27.3 KB |
User Guides & Manuals | Evaluation Board User's Manual | 2.1.0 | August 2003 | 13.4 KB |
Software: Drivers | DOS | 1.0.0 | December 2009 | 1.1 MB |
Product Brochures | Interface Brochure | R02 | November 2024 | 3.6 MB |
Schematics & Design Files | ISA Eval Board Schematic | 2.1.0 | August 2007 | 105 KB |
Quality & RoHS
Parts & Purchasing
Part Number | Pkg Code | Min Temp | Max Temp | Status | Suggested Replacement | Buy Now | PDN |
---|---|---|---|---|---|---|---|
XR88C92CJ-F | PLCC44 | 0 | 70 | EOL | |||
XR88C92CJTR-F | PLCC44 | 0 | 70 | OBS | XR88C92CJ-F | ||
XR88C92CV-F | LQFP44 | 0 | 70 | OBS | XR88C192CV-F | ||
XR88C92CVTR-F | LQFP44 | 0 | 70 | OBS | XR88C192CV-F | ||
XR88C92IJ-F | PLCC44 | -40 | 85 | OBS | XR88C92CJ-F | ||
XR88C92IJTR-F | PLCC44 | -40 | 85 | OBS | XR88C92CJ-F | ||
XR88C92IV-F | LQFP44 | -40 | 85 | OBS | |||
XR88C92IVTR-F | LQFP44 | -40 | 85 | OBS |
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Packaging
Pkg Code | Details | Quantities | Dimensions |
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LQFP44 |
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PLCC44 |
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Notifications
FAQs & Support
Search our list of FAQs for answers to common technical questions.
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Please check that all the following conditions are satisfied first.
- no interrupts pending (ISR bit-0 = 1)
- modem inputs are not toggling (MSR bits 0-3 = 0)
- RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
- TX and RX FIFOs are empty
Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.
See more on Sleep Mode in AN204 UART Sleep Mode.
Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.
See more on Sleep Mode in AN204 UART Sleep Mode.
Read LSR register to check whether the UART receives the data or not.
- If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
- If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
- If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.
See more on Sleep Mode in AN204 UART Sleep Mode.
- Check whether the register set can be accessed.
- Check whether the crystal is oscillating fully.
- Check whether the data can be transmitted in internal loopback mode.
See more on Sleep Mode in AN204 UART Sleep Mode.