XRT75VL00D

The XRT75VL00D is a single-channel fully integrated Line Interface Unit (LIU) with Sonet Desynchronizer for E3/DS3/STS-1 applications. It incorporates an independent Receiver, Transmitter and Jitter Attenuator in a single 52 pin TQFP package. The XRT75VL00D can be configured to operate in either E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz) modes. The transmitter can be turned off (tri-stated) for redundancy support and for conserving power.

The XRT75VL00D’s differential receiver provides high noise interference margin and is able to receive the data over 1000 feet of cable or with up to 12 dB of cable attenuation.

The XRT75VL00D incorporates an advanced crystal-less jitter attenuator that can be selected either in the transmit or receive path. The jitter attenuator performance meets the ETSI TBR-24 and Bellcore GR-499 specifications. Also, the jitter attenuator can be used for clock smoothing in SONET STS-1 to DS3 de-mapping.

The XRT75VL00D provides both Serial Microprocessor Interface as well as Hardware mode for programming and control.

The XRT75VL00D supports local, remote and digital loop-backs. The XRT75VL00D also contains an on-board Pseudo Random Binary Sequence (PRBS) generator and detector with the ability to insert and detect single bit error.

Receiver:

• On chip Clock and Data Recovery circuit for high input jitter tolerance
  
• Meets E3/DS3/STS-1 Jitter Tolerance Requirements
  
• Detects and Clears LOS as per G.775
  
• Meets Bellcore GR-499 CORE Jitter Transfer Requirements
  
• Receiver Monitor mode handles up to 20 dB flat loss with 6 dB cable attenuation
  
• Compliant with jitter transfer template outlined in ITU G.751, G.752, G.755 and GR-499-CORE,1995 standards
  
• Meets ETSI TBR 24 Jitter Transfer Requirements
  
• On chip B3ZS/HDB3 encoder and decoder that can be either enabled or disabled
  
• On-chip clock synthesizer provides the appropriate rate clock from a single 12.288 MHz Clock
  
• Provides low jitter output clock

• Compliant with Bellcore GR-499, GR-253 and ANSI T1.102 Specification for transmit pulse
  
• Tri-state Transmit output capability for redundancy applications
  
• Transmitter can be turned on or off

• On chip advanced crystal-less Jitter Attenuator
  
• Jitter Attenuator can be selected in Receive or Transmit paths
  
• 16 or 32 bits selectable FIFO size
  
• Meets the Jitter and Wander specifications described in T1.105.03b,ETSI TBR-24, Bellcore GR-253 and GR-499 standards
  
• Jitter Attenuator can be disabled

• 5 wire Serial Microprocessor Interface for control and configuration
  
• Supports optional internal Transmit Driver Monitoring
  
• PRBS error counter register to accumulate errors
  
• Hardware Mode for control and configuration
  
• Supports Local, Remote and Digital Loop-backs
  
• Single 3.3 V ± 5% power supply
  
• 5 V Tolerant I/O
  
• Available in 52 pin TQFP
  
• -40°C to 85°C Industrial Temperature Range
  
• Pb-Free, RoHS Compliant Versions Offered

• E3/DS3 Access Equipment
• DSLAMs
• Digital Cross Connect Systems
• CSU/DSU Equipment
• Routers
• Fiber Optic Terminals