Overview
Information | I2C/SPI UART with 128-Byte FIFO and Integrated Level Shifters |
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Data Bus Interface | I2C/SPI |
# of Channels | 1 |
Max Data Rate 3.3V (Mbps) | 24 |
Max Data Rate 2.5V (Mbps) | 16 |
Max Data Rate 1.8V (Mbps) | 10 |
Tx/Rx FIFO (Bytes) | 128/128 |
FIFO Level Counters | ✔ |
Program. Trigger Levels | ✔ |
Auto Flow Control | ✔ |
Auto RS-485 Half-Duplex Control | ✔ |
Multidrop (9-bit) Mode | ✔ |
Fractional Baud Rate Generator | ✔ |
Power Down Mode | ✔ |
Integrated Level Shifters | ✔ |
5V Tolerant Inputs | ✔ |
Supply Voltage Range VCC (V) | 1.62 to 3.63 |
No. of GPIOs | 4;QFN-24,8;QFN-32 |
Max UART/GPIO Input Voltage (V) | 5.5 |
Max UART/GPIO Output Voltage (V) | 1.62-3.63 |
Temperature Range (°C) | -40 to 85 |
Package | QFN-24, QFN-32 |
The XR20M1280¹ (M1280) is a single-channel I2C/SPI Universal Asynchronous Receiver and Transmitter (UART) with integrated level shifters and 128 bytes of transmit and receive FIFOs.
For flexibility in a mixed voltage environment, the M1280 has 4 VCC pins. There is a VCC pin for the core, a VCC pin for the UART signals, a VCC pin for the CPU interface signals and a VCC pin for the GPIO signals. The VCC pins for the UART, GPIO and I2C/SPI interface signals allow for the M1280 to interface with devices operating at different voltage levels eliminating the need for external voltage level shifters. The VCC core voltage helps to lower the overall power consumption for applications that use slower data rates.
The Auto RS-485 Half-Duplex Direction control feature simplifies both the hardware and software for half-duplex RS-485 applications. In addition, the Multidrop mode with Auto Address detection and Address Byte Control features increase the performance by simplifying the software routines.
The Independent TX/RX Baud Rate Generator feature allows the transmitter and receiver to operate at different baud rates. In addition, the Fractional Baud Rate Generator feature provides flexibility for crystal/clock frequencies for generating standard and non-standard baud rates.
The M1280 has programmable transmit and receive FIFO trigger levels, automatic hardware and software flow control, and data rates of up to 24 Mbps. Power consumption of the M1280 can be minimized by enabling the sleep mode.
The M1280 has a 16550 compatible register set that provide users with operating status and control, receiver error indications, and modem serial interface controls. An internal loopback capability allows onboard diagnostics. The M1280 has a selectable I2C/SPI bus interface.
NOTE: ¹Covered by U.S. Patent #5,649,122.- Integrated Level Shifters on CPU interface, UART and GPIO signals
- Selectable I2C/SPI bus interface
- 26MHz maximum SPI clock
- 24Mbps maximum UART data rate
- Up to 16 GPIOs
- 128-Bytes TX and RX FIFOs
- Programmable TX/RX trigger levels
- TX/RX FIFO Level Counters
- Independent TX/RX Baud Rate Generator
- Fractional Baud Rate Generator
- Auto RTS/CTS Hardware Flow Control
- Auto XON/XOFF Software Flow Control
- Auto RS-485 Half-Duplex Direction Control
- Multidrop mode w/ Auto Address Detect (RX)
- Multidrop mode w/ Address Byte Control (TX)
- Sleep Mode with Automatic Wake-up
- Infrared (IrDA 1.0 and 1.1) mode
- 1.62V to 3.63V supply operation
- Crystal oscillator or external clock input
- 5V tolerant inputs
- Personal Digital Assistants (PDAs)
- Cellular Phones/Data Devices
- Battery-Operated Devices
- Global Positioning System (GPS)
- Bluetooth
Documentation & Design Tools
Type | Title | Version | Date | File Size |
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Data Sheets | XR20M1280 I2C/SPI UART with 128-Byte FIFO and Integrated Level Shifters | 1.0.1 | July 2021 | 2.3 MB |
Application Notes | DAN-190, MaxLinear UARTs in RS-485 Applications | R01 | July 2023 | 2.4 MB |
User Guides & Manuals | XR20M1280 Evaluation Board User's Manual | 1.0.0 | December 2010 | 243 KB |
Product Flyers | I2C/SPI UART with 128-Byte FIFO and Integrated Level Shifters | 1.0.0 | November 2010 | 376.6 KB |
Schematics & Design Files | XR20M1280 Eval Board Gerber Files | REV 1 | February 2019 | 224.5 KB |
Schematics & Design Files | XR20M1280 Eval Board Layout | REV 1 | February 2019 | 2.8 MB |
Schematics & Design Files | Evaluation Board Schematic | 1.0.0 | February 2012 | 167.9 KB |
Product Brochures | Interface Brochure | R02 | November 2024 | 3.6 MB |
Software: Drivers | Linux 3.x.x | 1.1.0 | June 2022 | 24.2 KB |
Quality & RoHS
Part Number | RoHS | Exempt | RoHS | Halogen Free | REACH | TSCA | MSL Rating / Peak Reflow | Package |
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XR20M1280IL32-F | N | Y | Y | Y | Y | L2 / 260ᵒC | QFN32 5x5 OPT3 |
XR20M1280IL24-F | N | Y | Y | Y | Y | L2 / 260ᵒC | QFN24 4x4 OPT1 |
XR20M1280IL24TR-F | N | Y | Y | Y | Y | L2 / 260ᵒC | QFN24 4x4 OPT1 |
Click on the links above to download the Certificate of Non-Use of Hazardous Substances.
Parts & Purchasing
Part Number | Pkg Code | Min Temp | Max Temp | Status | Suggested Replacement | Buy Now | Order Samples | PDN |
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XR20M1280IL24-F | QFN24 4x4 OPT1 | -40 | 85 | Active | Order | |||
XR20M1280IL24TR-F | QFN24 4x4 OPT1 | -40 | 85 | Active | Order | |||
XR20M1280IL32-F | QFN32 5x5 OPT3 | -40 | 85 | Active | Order | |||
XR20M1280IL32TR-F | QFN32 5x5 OPT3 | -40 | 85 | OBS | XR20M1280IL32-F | |||
XR20M1280IL40-F | QFN40 6x6 OPT3 | -40 | 85 | OBS | XR20M1280IL32-F | |||
XR20M1280IL40TR-F | QFN40 6x6 OPT3 | -40 | 85 | OBS | XR20M1280IL32-F | |||
XR20M1280L24-0A-EB | Board | Active | ||||||
XR20M1280L24-0B-EB | Board | Active | ||||||
XR20M1280L32-0A-EB | Board | Active | ||||||
XR20M1280L32-0B-EB | Board | Active |
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Packaging
Pkg Code | Details | Quantities | Dimensions |
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QFN24 4x4 OPT1 |
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QFN32 5x5 OPT3 |
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QFN40 6x6 OPT3 |
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Notifications
FAQs & Support
Search our list of FAQs for answers to common technical questions.
For material content, environmental, quality and reliability questions review the Quality tab or visit our Quality page.
For ordering information and general customer service visit our Contact Us page.
Submit a Technical Support Question As a New Question
For some UARTs, Microsoft certified drivers are available for Windows Operating System and can be downloaded via Windows Update. These drivers and others, including for Linux and other Operating Systems can be found by visiting https://www.exar.com/design-tools/software-drivers Please note Software Driver Use Terms.
Click on the version link under Driver Version of the desired type of UART, part number and operating system. A zip file is downloaded which contains a ReadMe file with instructions.
Links to datasheets and product family pages are in the software driver table for easy reference.Find the product page of the part that you want to get an evaluation board for and click on Parts & Purchasing. Example:
Find the icons under Buy Now or Order Samples:
Click on the Buy Now icon and see who has stock and click on the Buy button:
Alternatively, you can click on the Order Samples
If the icons are missing, then contact Customer Support.
https://www.exar.com/quality-assurance-and-reliability/lead-free-program
The Parts & Purchasing section of the product page shows the Status of all orderable part numbers for that product. Click Show obsolete parts, to see all EOL or OBS products.
Please check that all the following conditions are satisfied first.
- no interrupts pending (ISR bit-0 = 1)
- modem inputs are not toggling (MSR bits 0-3 = 0)
- RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
- TX and RX FIFOs are empty
Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.
See more on Sleep Mode in AN204 UART Sleep Mode.
Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.
See more on Sleep Mode in AN204 UART Sleep Mode.
Read LSR register to check whether the UART receives the data or not.
- If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
- If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
- If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.
See more on Sleep Mode in AN204 UART Sleep Mode.
- Check whether the register set can be accessed.
- Check whether the crystal is oscillating fully.
- Check whether the data can be transmitted in internal loopback mode.
See more on Sleep Mode in AN204 UART Sleep Mode.
Videos
MxL UARTs Auto RS-485 Direction Control
This video describes how the automatic RS-485 half-duplex direction control feature in MaxLinear UARTs reduces driver development and frees up CPU/MCU loading. This feature eliminates the need to monitor the status of the UART’s transmit shift register and automatically switches MaxLinear RS-485 transceivers from the transmit mode to the receive mode. This video summarizes the content in application note DAN-190.